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  SCA1020-D06 murata electronics oy 1/19 www.muratamems.fi doc. nr. 8263900 rev.b p r o d u c t s p e c i f i c a t i o n f o r z y - d u a l a x i s a c c e l e r o m e t e r s c a 1 0 2 0 ? d 0 6
SCA1020-D06 murata electronics oy 2/19 www.muratamems.fi doc. nr. 8263900 rev.b table of contents 1 general description ............................... ................................................... .................... 3 1.1 block diagram ..................................... ................................................... .............. 3 1.2 sca1020 family accelerometer features ............. ............................................... 3 2 electrical specifications ......................... ................................................... .................... 4 2.1 electrical connection ............................. ................................................... ........... 4 2.1.1 recommended connection when spi interface is used . ................................... 5 2.1.2 recommended connection when analog output is used . ................................. 5 2.1.3 recommended emc protection circuitry .............. ............................................ 6 2.2 absolute maximum ratings .......................... ................................................... ..... 6 2.3 electrical specification of the sca1020 ? d06 ..... ............................................... 7 2.3.1 analog output ..................................... ................................................... ........... 7 2.3.2 digital output .................................... ................................................... ........... 10 3 spi interface ..................................... ................................................... ....................... 11 3.1 dc characteristics of spi interface ............... ................................................... .. 13 3.2 ac characteristics of spi interface ............... ................................................... .. 14 3.3 spi commands ...................................... ................................................... ........ 15 4 mechanical specification (reference only) ......... ................................................... ..... 17 4.1 dimensions (reference only) ....................... ................................................... .. 17 5 mounting .......................................... ................................................... ........................ 18
SCA1020-D06 murata electronics oy 3/19 www.muratamems.fi doc. nr. 8263900 rev.b 1 general description the sca1020 accelerometer consists of two silicon b ulk micro machined sensing element chips and a signal conditioning asic. the chips are mounted on a pre-molded package and wire bonded to appropriate contacts. the sensing el ements and asic are protected with silicone gel and lid. the sensor has 12 smd legs (g ull-wing type). 1.1 block diagram x_out a y a x agnd por interface+control logic+eeprom osc clk gen sensing element x_ext_c csb sck mosi miso st_x/test_in vdd vss c/v pfilter sc dac sc sc filter1 sc filter2 sample and hold s/h sc gain dac sc st_y sensing element fail_det sc y_out y_ext_c bg adc dac c/v pfilter sc dac sc sc filter1 sc filter2 sample and hold s/h sc gain dac sc fail_det sc hv pump figure 1. block diagram of the sca1020 1.2 sca1020 family accelerometer features ? single +5v supply ? two ratiometric analog outputs in relation to supp ly voltage (vdd = 4.75....5.25v) ? wide load driving capability ? serial peripheral interface (spi) compatible ? provides digital output for both channels ? supports testing and programming ? non-volatile programming features ? factory programmable filter settings ( 400hz, 1 kh z, wb, ext_c ) ? offset and sensitivity calibration ? linear temperature compensation ? enhanced failure detection features ? true self test by deflecting the sensing elements? proof mass by electrostatic force. deflection voltage is adjustable with two me mory bits for both channels. the self-test is channel specific, and separately a ctivated for both channels by digital on-off commands via dedicated pins or via s pi bus. ? continuous sensing element interconnection failure check
SCA1020-D06 murata electronics oy 4/19 www.muratamems.fi doc. nr. 8263900 rev.b 2 electrical specifications 2.1 electrical connection the following is a typical requirement for electric al interface to the sca1020. if special over voltage or reverse polarity protection is needed, p lease contact vti technologies for application information. if self test (pins 9 and 10) is not used, it should be left floating / grounded 12 3 4 5 6 7 8 9 10 11 12 sck ext_c_1 miso mosi out_2 vss csb ext_c_2 st_2 st_1/test_in out_1 vdd no. node i/o description 1 sck input serial clock 2 nc nc nc 3 miso output master in slave out; data output 4 mosi input master out slave in; data input 5 out_2 output y axis output (ch 2) 6 vss power negative supply voltage (v ss ) 7 csb input chip select (active low). if only analo g outputs are used this should be connected to vdd or left floating. 8 nc nc nc 9 st_2 input self test input for y axis (ch 2) 10 st_1 / test_in input self test input for z axis (ch 1 ) / analog t est input 11 out_1 output z axis output (ch 1) 12 vdd power positive supply voltage (v dd ) figure 2. pin layout and description of the sca1020 nc nc
SCA1020-D06 murata electronics oy 5/19 www.muratamems.fi doc. nr. 8263900 rev.b 2.1.1 recommended connection when spi interface is used 2.1.2 recommended connection when analog output is used when sca1020 is used in analog mode and the pcb is designed correctly the sca610 / 620 and sca1020 are interchangeable. if the pcb layout is d esigned for sca1020, then sca610 / 620 can be used for single axis applications. pins 1, 2, 3, 4 and 8 can be connected to gnd (pins 2 and 8 can be connected also to vdd) but for the best emc performance these pins should be left floating. csb pin can be pulled up but it is recommended to l eft floating. the output of sca610 / 620 corresponds to the output of channel 1 in the sca10 20 1 2 3 4 5 6 7 8 9 10 11 12 sck nc miso mosi out_2 vss csb nc st_2 st_1 out_1 vdd vdd (+5v) min 100nf z y recommended spi-output connection on pcb chip select serial clock data out data in 1 2 3 4 5 6 7 8 9 10 11 12 sck nc miso mosi out_2 vss csb nc st_2 st_1/test_i n out_1 vdd vdd (+5v) out 1 (z) out 2 (y) self-test 1 self-test 2 min 100nf z y recommended analog output connection on pcb sca610 or sca620 connected to the sca1020 lay-out
SCA1020-D06 murata electronics oy 6/19 www.muratamems.fi doc. nr. 8263900 rev.b 2.1.3 recommended emc protection circuitry the purpose of the following recommendation is to g ive generic emc protection guidelines for the sca1020. emc susceptibility is highly dependent on the pcb layout and therefore the component values given here can be different depending on the actual pcb layout. with the following circuitry and properly designed pcb the part will pass 200v/m emc susceptibility tests. please note that only channel 1 output protection c ircuitry is presented. similar kind of circuit must be also at the channel 2 output. 2.2 absolute maximum ratings supply voltage (v dd ) -0.3 v to +5.5v (continuous) -0.3v to 7v (5 seconds during 1 minutes cycle ) voltage at input / output pins -0.3v to (v dd + 0.3v) esd hbm (human body model) 2kv cdm (charged device model) 500v storage temperature -55 c to +125 c operating temperature -40 c to +125 c mechanical shock drop from 1 meter on a concrete su rface. out 1 (z) 1 2 3 4 5 6 7 8 9 10 11 12 sck nc miso mosi out_2 vss csb nc st_2 st_1/test_i n out_1 vdd vdd (+5v) out 2 (y) self-test 1 self-test 2 min 100nf z y recommended emc protection circuitry vdd (+5v) gnd 68pf 68pf 10 ohm
SCA1020-D06 murata electronics oy 7/19 www.muratamems.fi doc. nr. 8263900 rev.b 2.3 electrical specification of the sca1020 ? d06 2.3.1 analog output vdd = 5.00v and ambient temperature (23c 5c) unless otherwise specified . kpc (1 7 parameter condition min. typ max. units z axis (out_1) measuring range (1 nominal -1.7 +1.7 g (2 y axis (out_2) measuring range (1 nominal -1.7 +1.7 g (2 supply voltage vdd 4.75 5.0 5.25 v current consumption vdd = 5 v; no load 5.0 ma operating temperature -40 +125 c resistive output load (analog output) vout to vdd or vss 10 kohm capacitive load (analog output) vout to vdd or vss 20 nf min. output voltage; vdd = 5v 10k from vout to vdd 0 0.25 v max. output voltage; vdd = 5v 10k from vout to vss 4 .75 5.00 v z axis (out_1) offset (output at 0g) (3, 13 @ room temperature vdd/2 v z axis (out_1) sensitivity (4, 13 @ room temperature 0.24 x vdd v/g z axis (out_1) offset error (output at 0g) (5, 13 rt(23 5 c) -20...+85 c -40?+125 c -40 -75 -90 - - - +40 +75 +90 mg z axis (out_1) offset temperature dependency (output at 0g) (5, 13,14 -20...+85 c -40?+125 c -35 -50 - - +35 +50 mg z axis (out_1) sensitivity error (6, 13 -40...+85 c -40...+125 c -4 3 - +4 % y axis (out_2) offset (output at 0g) (3, 13 @ room temperature vdd/2 v y axis (out_2) sensitivity (4, 13 @ room temperature 0.24 x vdd v/g y axis (out_2) offset error (output at 0g) (5, 13 rt(25 5 c) -20...+85 c -40?+125 c -40 -75 -90 - - - +40 +75 +90 mg y axis (out_2) offset temperature dependency (output at 0g) (5, 13,14 -20...+85 c -40?+125 c -35 -50 - - +35 +50 mg y axis (out_2) sensitivity error (6, 13 -40...+85 c -40...+125 c -4 3 - +4 % typical non-linearity (7 range = -1g...+1g -20 - +20 mg z axis (out_1) frequency response -3db (8 20 50 80 hz y axis (out_2) frequency response -3db (8 20 50 80 hz ratiometric error (9 vdd = 4.75...5.25v -2 - 2 % cross-axis sensitivity (10 @ room temperature 3.5 % output noise (11 from dc...4khz 5 mvrms start-up delay reset and parity check 10 ms self test input pull down current vdd = 5v 10 21 30 a t1: t st-on (1 5 self test on period. controlled externally by user 10 100 ms t2: tsat.del. (1 5 saturation delay. time when element beam remains still out from linear operating range. 20 ms t3: t recov. (1 5 recovery time when element is back in linear operating range 50 ms
SCA1020-D06 murata electronics oy 8/19 www.muratamems.fi doc. nr. 8263900 rev.b t4: t stab. (15 = t2+t3 stabilization time, when self test is released. 70 ms t5: t r (1 5 rise time during self test, when vout reach v2 10 ms v2 (1 5 vout during self test 4.75 v v3 (1 5 , 1 6 stabilized output voltage after self-test is released. 0.95*v 1 v1 1.05 * v1 note 1. the measuring range is limited only by the sensitivity, offset and supply voltage rails of the device note 2. 1g = 9.82m/s 2 note 3. offset specified as voffset = vout(0g) [ v ]. see note 13. note 4. sensitivity specified as vsens = {vout(+1g) - vout(-1g)}/2 [ v/g ]. see note 13 note 5. offset error specified as offset error = {v out(0g) - vdd/2} / vsens [ g ] vsens = nominal sensitivity vdd/2 = nominal offset see note 13. note 6. sensitivity error specified as sensitivity error = { [vout(+1g) - vout(-1g)] / 2 - vsens} / v sens x 100% [% ] vsens = nominal sensitivity see note 13. note 7. from straight line through -1g and +1g. note 8. the frequency response is determined by the sensing element?s internal gas damping. the output has true dc (0hz) response. note 9. the ratiometric error is specified as. re vout vx v vx vout v = ? ?? ?? ? ?? ?? ? 100% 1 5 00 5 (@ ) . (@ ) note 10. the cross-axis sensitivity determines how much acceleration, perpendicular to the measuring a xis, couples to the output. the total cross-axis sensitivity is the geo metric sum of the sensitivities of the two axes tha t are perpendicular to the measuring axis. note 11. in addition, supply voltage noise couples to the output due to the ratiometric nature of the accelerometer. note 12. the self-test will increase the output vo ltage. the output will go to vdd rail. the purpose of the self-test is to check out the total functionality of the sensor. it is no t meant for calibration or auto zeroing.
SCA1020-D06 murata electronics oy 9/19 www.muratamems.fi doc. nr. 8263900 rev.b note 13. measuring positions note 14. offset temperature dependency (offset tde p) specified as offset tdep = {vout(0g@rt) - vout(0g@t) } / vsens [ g ] vout(0g@rt) = vout(0g) at room temperature (23 5 c) vout(0g@t) = vout(0g) at temperature t vsens = nominal sensitivity see note 13. note 15. self-test waveforms at 0g position (z=0g and y=0g): note 16. v1= initial output voltage before self-t est activation v3= output voltage after self-test has been remove d and after stabilization time. please note that th e error band specified for v3 is to guarantee that the outp ut is within 5% of the initial value after the spec ified stabilization time. after longer time v1=v3. note 17. cc= critical characteristics. must be 100% monitored during production vout 5v 0 v time [ ms ] t1 t2 t3 t4 v1 v2 v3 st pin voltage 0 v 5 v t5
SCA1020-D06 murata electronics oy 10/19 www.muratamems.fi doc. nr. 8263900 rev.b sc= significant characteristic. the process capabil ity (cpk) must be better than 1.33, which allows sa mple based testing. if process is not capable the part w ill be 100% tested 2.3.2 digital output vdd = 5.00v and ambient temperature unless otherwis e specified . parameter condition min. typ max. units output load @500khz 1 nf spi clock frequency 500 khz internal a/d conversion time 150 s data transfer time @500khz 38 s
SCA1020-D06 murata electronics oy 11/19 www.muratamems.fi doc. nr. 8263900 rev.b 3 spi interface serial peripheral interface (spi) is a 4-wire synch ronous serial interface. data communication is enabled with low active slave select or chip sel ect wire (csb). data is transmitted with 3- wire interface consisting of serial data input (mos i), serial data output (miso) and serial clock (sck). every spi system consists of one maste r and one or more slaves, where the master is defined as the microcomputer that provide s the spi clock, and the slave is any integrated circuit that receives the spi clock from the master. data out (mosi) data in (miso) serial clock (sck) ss0 ss1 ss2 ss3 master microcontroller si so sck cs slave si so sck cs si so sck cs si so sck cs figure 4. typical spi connection the spi interface of this asic is designed to suppo rt almost any micro controller that uses software implemented spi. however it is not designe d to support any particular hardware implemented spi found in many commercial micro cont rollers. serial peripheral interface in this product is used in testing and calibration pur poses as well as in the final application. in normal use some testing and calibration commands ar e disabled and have not been documented here . this asic operates always as a slave device in the master-slave operation mode. the data transfer between the maste r ( p test machine etc.) and asic is performed serially with four wire system. mosi master out slave in p asic miso master in slave out asic p sck serial clock p asic csb chip select (low active) p asic each transmission starts with a falling edge on csb and ends with the rising edge. during the transmission, commands and data are controlled by sck and csb according to the following rules: ? commands and data are shifted msb first lsb last ? each output data/status-bits are shifted out on th e falling edge of sck (miso line) ? each bit is sampled on the rising edge of sck (mos i line)
SCA1020-D06 murata electronics oy 12/19 www.muratamems.fi doc. nr. 8263900 rev.b ? after the device is selected with csb going low, a n 8-bit command is received. the command defines the operations to be performed ? the rising edge of csb ends all data transfer and resets internal counter and command register ? if an invalid command is received, no data will be shifted into chip and the miso will remain in high impedance state until the falli ng edge of csb. this will reinitialize the serial communication. ? to be able to perform any other command than those listed in table 1. spi commands, the lock register content has to be set correctly. if other command is feed without correct lock register content, no data will be shifted into chip and the miso will remain in high impedance state until the falling edge of csb. ? data transfer to mosi continues right after the co mmand is received in all cases where data is to be written to asic?s internal regi sters ? data transfer out from miso starts with a falling edge of sck right after the last bit of spi command is sampled in on the rising edge of sck ? maximum data transfer speed exceeds 500 khz clock rate spi command can be an individual command or a combi nation of command and data. in the case of combined command and data, the input da ta follows uninterruptedly the spi command and the output data is shifted out parallel with the input data. 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 csb sck m iso m o s i 0 1 2 3 4 5 6 7 8 9 10 11 1 2 13 1 4 15 h ig h im ped a n c e c o m m a n d d a ta in d a ta o u t figure 5. one command and data transmission over t he spi after power up the circuit starts up in measure mod e. this is the operation mode that is used in the final application.
SCA1020-D06 murata electronics oy 13/19 www.muratamems.fi doc. nr. 8263900 rev.b 3.1 dc characteristics of spi interface supply voltage is 5 v unless otherwise noted. curre nt flowing into the circuit has positive values. parameter conditions symbol min typ max unit input terminal csb pull up current v in = 0 v i pu 13 22 35 a input high voltage v ih 4 vdd+0.3 v input low voltage v il -0.3 1 v hysteresis v hyst 0.23*vdd v input capacitance c in 2 pf input terminal mosi, sck pull down current v in = 5 v i pd 9 17 29 a input high voltage v ih 4 vdd+0.3 v input low voltage v il -0.3 1 v hysteresis v hyst 0.23*vdd v input capacitance c in 2 pf output terminal miso output high voltage i > -1ma v oh vdd-0.5 v output low voltage i < 1 ma v ol 0.5 v tristate leakage 0 < v miso < vdd i leak 5 100 pa table 1. dc characteristics of spi interface
SCA1020-D06 murata electronics oy 14/19 www.muratamems.fi doc. nr. 8263900 rev.b 3.2 ac characteristics of spi interface parameter conditions symbol min typ max unit terminal csb, sck time from csb (10%) to sck (90%) 1 t ls1 120 ns time from sck (10%) to csb (90%) 1 t ls2 120 ns terminal sck sck low time load capacitance at miso < 2 nf t cl 1 s sck high time load capacitance at miso < 2 nf t ch 1 s terminal mosi, sck time from changing mosi (10%, 90%) to sck (90%) 1 . data setup time t set 30 ns time from sck (90%) to changing mosi (10%,90%) 1 . data hold time t hol 30 ns terminal mi so, csb time from csb (10%) to stable miso (10%, 90%) 1 . load capacitance at miso < 15 pf t val1 10 100 ns time from csb (90%) to high impedance state of miso 1 . load capacitance at miso < 15 pf t lz 10 100 ns terminal miso, sck time from sck (10%) to stable miso (10%, 90%) 1 . load capacitance at miso < 15 pf t val2 100 ns terminal csb time between spi cycles, csb at high level (90%) t lh 15 s 1 not production tested table 2. ac characteristics of spi interface csb sck mosi miso t ls1 t ch t hol t set t val1 t val2 t lz t ls2 t lh msb in msb out lsb in lsb out data out data in t cl figure 6. spi bus timing diagram
SCA1020-D06 murata electronics oy 15/19 www.muratamems.fi doc. nr. 8263900 rev.b 3.3 spi commands this spi interface utilizes an 8-bit instruction (o r command) register. the list of commands available to end-user is presented in table 3. command name command format description: meas 00000000 measure mode (normal operation mode a fter power on) rwtr 00001000 read and write temperature data regis ter rdsr 00001010 read status register rload 00001011 reload nv data to memory output regi ster stx 00001110 activate self test for z-channel sty 00001111 activate self test for y-channel rdax 00010000 read z-channel acceleration through s pi rday 00010001 read y-channel acceleration through s pi table 3. spi commands measure mode (meas): standard operation mode after power-up. during nor mal operation, meas command is exit command from self-t est. read and write temperature data register (rwtr): temperature data register can be read during normal operation without affecting the circuit operation. temperature data register is loaded in every 150 s, and the load operation is disabled whenever the csb signal is low, hence csb has to stay high at least 150 s prior the rwtr command in order to guarantee correct data. the data transfer is as presented in figure 5 and data is transferred msb first. in normal operation, it does n?t matter what data is written to temperature data register during rwtr command and h ence all zeros is recommended. read status register (rdsr): read status register command provides access to th e status register. status register format is shown in table 4. bold values in definition column are the expected values during normal operation. bit definition bit 3 (perr) bit 3 = 0 parity check hasn?t detected errors bit 3 = 1 parity error detected bit 2 (test) bit 2 = 0 analog test mode isn?t active bit 2 = 1 analog test mode is active bit 1 (lock) bit 1 = 0 lock register is open bit 1 = 1 lock register is locked bit 0 (pd) bit 0 = 0 circuit is not in power down mode bit 0 = 1 circuit is in power down mode table 4. status register bit definitions reload nv data to memory output register (rload): reads nv data from eeprom to the memory output register. self test for z-channel (stx): stx command activates the circuit?s self test func tion for the z-channel. internal charge pump is activated an d high voltage is applied to the z- channel acceleration sensor element electrode. this causes electrostatic force, which
SCA1020-D06 murata electronics oy 16/19 www.muratamems.fi doc. nr. 8263900 rev.b deflects the beam of the sensing element and simula tes the acceleration to the positive direction. z-channel self-test is de-activated by g iving meas command. self test for y-channel (sty): sty command activates the circuit?s self test func tion for the y-channel. internal charge pump is activated an d high voltage is applied to the y- channel acceleration sensor element electrode. this causes electrostatic force, which deflects the beam of the sensing element and simula tes the acceleration to the positive direction. y-channel self-test is de-activated by g iving meas command. read z-channel acceleration (rdax): rdax command provides access to ad converted z-channel acceleration signal stored in a cceleration data register x. during normal operation acceleration data register x is lo aded in every 150 s, and the load operation is disabled whenever the csb signal is lo w, hence csb has to stay high at least 150 s prior the rdax command in order to guarantee corr ect data. data output is an 11- bit digital word, which is feed out msb first and l sb last. (see figure 7). 1 0 9 8 7 6 5 0 1 4 3 2 c s b s c k m is o m o s i 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 h ig h im p e d a n c e c o m m a n d d a t a o u t 1 6 1 7 1 8 figure 7. rdax command and data transmission over the spi read y-channel acceleration (rday): rday command provides access to ad converted y-channel acceleration signal which is st ored in acceleration data register y. during normal operation acceleration data register y is loaded in every 150 s and the load operation is disabled whenever the csb signal is low, hence csb has to stay high at least 150 s prior the rday command in order to guarantee corr ect data. data output is an 11-bit digital word, which is feed out msb first and lsb last detailed information on all spi commands is present ed in document ic008 dual axis acceleration sensor asic, digital specification.
SCA1020-D06 murata electronics oy 17/19 www.muratamems.fi doc. nr. 8263900 rev.b 4 mechanical specification (reference only) lead frame material: copper plating: nickel followed by gold solderability: jedec standard: jesd22-b102-c co-planarity error 0.1mm max. 4.1 dimensions (reference only) figure 8. mechanical dimensions of the sca1020
SCA1020-D06 murata electronics oy 18/19 www.muratamems.fi doc. nr. 8263900 rev.b 5 mounting the sca1020 is suitable for sn-pb eutectic and pb- free soldering process and mounting with normal smd pick-and-place equipment. recommended sca1020 body temperature profile during reflow soldering: profile feature sn-pb eutectic assembly pb-free ass embly average ramp-up rate (t l to t p ) 3c/second max. 3c/second max. preheat - temperature min (t smin ) - temperature max (t smax ) - time (min to max) (ts) 100c 150c 60-120 seconds 150c 200c 60-180 seconds tsmax to t l - ramp up rate 3c/second max time maintained above: - temperature (t l ) - time (t l ) 183c 60-150 seconds 217c 60-150 seconds peak temperature (t p ) 240 +0/-5c 250 +0/-5c time within 5c of actual peak temperature (t p ) 10-30 seconds 20-40 seconds ramp-down rate 6c/second max 6c/second max time 25 to peak temperature 6 minutes max 8 minutes max figure 9. recommended sca1020 body temperature prof ile during reflow soldering. ref. ipc/jedec j-std-020b. note. preheating time and temperatures according t o solder paste manufacturer. component body temperature during the soldering sho uld be measured from the body of the component.
SCA1020-D06 murata electronics oy 19/19 www.muratamems.fi doc. nr. 8263900 rev.b the moisture sensitivity level of the part is 3 acc ording to the ipc/jedec j-std-020b. the part should be delivered in a dry pack. the man ufacturing floor time (out of bag) in the customer?s end is 168 hours. maximum soldering temperature is 250 c/40sec. figure 10. recommended pcb lay-out notes: ? it is important that the part is parallel to the p cb plane and that there is no angular alignment error from intended measuring direction d uring assembly process. ? 1 mounting alignment error will increase the cros s-axis sensitivity by 1.7% ? 1 mounting alignment error will change the output by 17mg ? to achieve the highest accuracy and to minimize re sonance, it is recommended to glue the accelerometer to the pcb before soldering ? wave soldering is not recommended. ? a supply voltage by-pass capacitor (>100nf) must b e used and located as close as possible to the vdd and gnd pins. ? note: when the accelerometer is oriented in such a way that the arrow points toward the earth, the output will decrease. please also note t hat you can rotate the part around the measuring axis for optimum mounting location.


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